In computer systems, there is often a need to process data as it is transferred to or from a main memory device, such as a memory slave. This data processing constitutes an important functionality of such systems.
One important example of such data processing comprises data compression and decompression. In some applications, it is desirable to minimize, for cost or area reasons, the size of main memory devices. It is therefore desirable to compress data as it is being written to the main memory, and to expand it as it is subsequently read back. This processing is advantageous in that it allows for efficient storage of data in main memory, while preserving the ability for subsequent reads to return the data to requesting master devices in an original, uncompressed format.
A second need, while transferring data to or from a main memory device in a computer system, involves security. Main memory is commonly located in devices that are external to the chip. The physical interface between the chip and these devices is exposed and often subject to easy observation. One solution for preserving security is to encrypt critical data as it is written to main memory, so that if observed, the original meaning is hidden.
There are several known methods for handling the processing of data that is directed to a main device, such as a main memory. A first conventional method is through the employment of a data processing bridge. In conventional systems, the data processing bridge is a connection for all transfers directed to main memory from a master, regardless of whether the data involved requires data processing. Typically, the data processing bridge accepts data as a slave from a master coupled to a first bus. The data processing bridge then transfers the data on a second bus to the main memory after performing any appropriate processing as indicated by the requesting master device.
However, a drawback and performance limitation of employing the conventional data processing bridge is the performance loss due to time required to accept data from a first bus and introduce it on the second bus, wherein the second bus is coupled to the target memory device. The “handshaking” required for address arbitration and acknowledgment reduces the overall bandwidth available to a main memory device and increases system delays, especially in applications where data is transferred using a large percentage of smaller sized transfers. In other words, all data passed through the bus pays a speed and bandwidth penalty, whether or not the data transferred requires data processing by the data processing bus.
A second conventional method is to include the processing functionality directly within the main memory device itself. This method has an advantage in that there is no inherent bandwidth loss due to converting data buses, as there was with the first conventional method. This is an approach that has drawbacks, however, because it increases the complexity and size of the main memory device and makes it a special purpose device. This specialization can also reduce the performance of the main memory device for applications that never need data processing support.
Therefore, there is a need for a data processing for use in computer systems that overcomes the shortcomings of existing data processors.